Arya Reais-Parsi - an FPGA for the Google/Skywater/Efabless ASIC shuttle
In this interview Arya Reais-Parsi talks about: 00:45? FPGA design is for a course 01:50? difference between other open FPGA fabrics 02:50? FPGAs as accelerators 04:27? their FPGA structure 06:30? how did they target ASIC? 09:27? GDS view of the FPGA structure 11:40? custom cells for FPGAs 14:40? making lab notes 16:00? how does actually taping something out change the feeling of the work? 17:10? how will this shuttle program changes things going forwards? 22:40? future of ASIC with more open tooling and access 24:30? toolchain for their FPGA: yosys & nextpnr Their group's application is here: https://github.com/ucb-cs250/caravel_...