Episode 37: A fireside chat with Harry Foster
Dr. Ashish Darbari delves into the findings of the 2020 Wilson Research report with Harry Foster in the last podcast this year. Together we gain more insight into design and verification trends. With 68% projects running behind schedule, and an equal number requiring respin for IC/ASIC, is the industry doing enough? With 23% of the semiconductor designs using RISC-V; and the headcount ratio of verification to design being 5:1 for processor verification, perhaps it's time to reflect and ask - are we doing enough? With these thoughts, we sign-off 2020, wishing you all Happy holidays and merry Christmas.